Add hardware header files

15 files changed, 1897 insertions, 0 deletions

diff --git a/libraries/MultiLCD/hardware/arm/HW_ARM.h b/libraries/MultiLCD/hardware/arm/HW_ARM.h
new file mode 100644
index 0000000..c71a5ff
--- /dev/null
+++ b/libraries/MultiLCD/hardware/arm/HW_ARM.h
@@ -0,0 +1,7 @@
+void UTFT::_convert_float(char *buf, double num, int width, byte prec)
+{
+	char format[10];
+	
+	sprintf(format, "%%%i.%if", width, prec);
+	sprintf(buf, format, num);
+}
diff --git a/libraries/MultiLCD/hardware/arm/HW_ARM_defines.h b/libraries/MultiLCD/hardware/arm/HW_ARM_defines.h
new file mode 100644
index 0000000..2881e17
--- /dev/null
+++ b/libraries/MultiLCD/hardware/arm/HW_ARM_defines.h
@@ -0,0 +1,40 @@
+// CTE TFT LCD/SD Shield for Arduino Due
+// -------------------------------------
+// Uncomment the following line if you are using this shield
+//#define CTE_DUE_SHIELD 1
+//
+// For this shield: RS=25, WR=26, CS=27, RST=28
+//********************************************************************
+
+// ElecHouse TFT LCD/SD Shield for Arduino Due
+// -------------------------------------
+// Uncomment the following line if you are using this shield
+//#define EHOUSE_DUE_SHIELD 1
+//
+// For this shield: RS=22, WR=23, CS=31, RST=33
+//********************************************************************
+
+// *** Hardwarespecific defines ***
+#define cbi(reg, bitmask) *reg &= ~bitmask
+#define sbi(reg, bitmask) *reg |= bitmask
+#define pulse_high(reg, bitmask) sbi(reg, bitmask); cbi(reg, bitmask);
+#define pulse_low(reg, bitmask) cbi(reg, bitmask); sbi(reg, bitmask);
+
+#define cport(port, data) port &= data
+#define sport(port, data) port |= data
+
+#define swap(type, i, j) {type t = i; i = j; j = t;}
+
+#define fontbyte(x) cfont.font[x]  
+
+#define pgm_read_word(data) *data
+#define pgm_read_byte(data) *data
+#define bitmapdatatype unsigned short*
+
+#if defined(TEENSYDUINO) && TEENSYDUINO >= 117
+  #define regtype volatile uint8_t
+  #define regsize uint8_t
+#else
+  #define regtype volatile uint32_t
+  #define regsize uint32_t
+#endif
diff --git a/libraries/MultiLCD/hardware/arm/HW_MX20DX256.h b/libraries/MultiLCD/hardware/arm/HW_MX20DX256.h
new file mode 100644
index 0000000..93df980
--- /dev/null
+++ b/libraries/MultiLCD/hardware/arm/HW_MX20DX256.h
@@ -0,0 +1,188 @@
+/**
+ *
+ * This file is a modified version of the HW_Teensy3.h created by Paul Stoffregen.
+ *
+ * Teensy 3.x pin definitions created by Dawnmist
+ * http://forum.pjrc.com/threads/18002-Teensy-3-0-driving-an-SSD1289-with-utft?p=34719&viewfull=1#post34719
+ *
+ * This file only supports the B and D ports as defined by Dawnmist for 8-bit and 16-bit display modules.
+ * Serial display modules are also supported.
+ * 
+ * NOTE: This file has only been tested on a Teensy 3.1
+ *
+**/
+
+// *** Hardware specific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+			if (VH==1)
+				sbi(P_SDA, B_SDA);
+			else
+				cbi(P_SDA, B_SDA);
+			pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+			if (VH==1)
+				sbi(P_RS, B_RS);
+			else
+				cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		*(volatile uint8_t *)(&GPIOD_PDOR) = VH;
+		pulse_low(P_WR, B_WR);
+		*(volatile uint8_t *)(&GPIOD_PDOR) = VL;
+		pulse_low(P_WR, B_WR);
+		break;
+	case 16:
+		*(volatile uint8_t *)(&GPIOD_PDOR) = VH;
+  		GPIOB_PCOR = 0x000F000F;							// clear data lines B0-3,B16-19
+        GPIOB_PSOR = (0x0F & VL) | ((VL >> 4) << 16);  		// set data lines 0-3,16-19 if set in cl
+		pulse_low(P_WR, B_WR);
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	GPIOD_PDDR |= 0xFF;
+	PORTD_PCR0  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR1  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR2  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR3  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR4  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR5  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR6  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+	PORTD_PCR7  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+
+	if (mode == 16)
+    {
+		GPIOB_PDDR |= 0x000F000F;
+		PORTB_PCR0  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR1  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR2  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR3  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR16 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR17 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR18 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+		PORTB_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+    }
+}
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	*(volatile uint8_t *)(&GPIOD_PDOR) = ch;
+  	GPIOB_PCOR = 0x000F000F;						// clear data lines B0-3,B16-19
+    GPIOB_PSOR = (0x0F & cl) | ((cl >> 4) << 16);  	// set data lines 0-3,16-19 if set in cl
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16); i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	*(volatile uint8_t *)(&GPIOD_PDOR) = ch;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16); i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/arm/HW_SAM3X8E.h b/libraries/MultiLCD/hardware/arm/HW_SAM3X8E.h
new file mode 100644
index 0000000..f4ac4ab
--- /dev/null
+++ b/libraries/MultiLCD/hardware/arm/HW_SAM3X8E.h
@@ -0,0 +1,242 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+#ifdef EHOUSE_DUE_SHIELD
+    pinMode(24, OUTPUT); digitalWrite(24, HIGH); // Set the TFT_RD pin permanently HIGH as it is not supported by UTFT
+#endif
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+			if (VH==1)
+				sbi(P_SDA, B_SDA);
+			else
+				cbi(P_SDA, B_SDA);
+			pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+			if (VH==1)
+				sbi(P_RS, B_RS);
+			else
+				cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD)
+		REG_PIOC_CODR=0xFF000;
+		REG_PIOC_SODR=(VH<<12) & 0xFF000;
+		pulse_low(P_WR, B_WR);
+		REG_PIOC_CODR=0xFF000;
+		REG_PIOC_SODR=(VL<<12) & 0xFF000;
+		pulse_low(P_WR, B_WR);
+#else
+		REG_PIOA_CODR=0x0000C000;
+		REG_PIOD_CODR=0x0000064F;
+		REG_PIOA_SODR=(VH & 0x06)<<13;
+		(VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
+		REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1);
+		pulse_low(P_WR, B_WR);
+
+		REG_PIOA_CODR=0x0000C000;
+		REG_PIOD_CODR=0x0000064F;
+		REG_PIOA_SODR=(VL & 0x06)<<13;
+		(VL & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
+		REG_PIOD_SODR=((VL & 0x78)>>3) | ((VL & 0x80)>>1);
+		pulse_low(P_WR, B_WR);
+#endif
+		break;
+	case 16:
+#if defined(CTE_DUE_SHIELD)
+        REG_PIOC_CODR=0xFF1FE;
+		REG_PIOC_SODR=(VL<<1) & 0x1FE;
+		REG_PIOC_SODR=(VH<<12) & 0xFF000;
+#elif defined(EHOUSE_DUE_SHIELD)
+		PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)VL)<<2) | (((uint32_t)VH)<<12)));
+#else
+		REG_PIOA_CODR=0x0000C080;
+		REG_PIOC_CODR=0x0000003E;
+		REG_PIOD_CODR=0x0000064F;
+		REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1);
+		(VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
+		REG_PIOC_SODR=((VL & 0x01)<<5) | ((VL & 0x02)<<3) | ((VL & 0x04)<<1) | ((VL & 0x08)>>1) | ((VL & 0x10)>>3);
+		REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1) | ((VL & 0x20)<<5) | ((VL & 0x80)<<2);
+#endif
+		pulse_low(P_WR, B_WR);
+		break;
+	case LATCHED_16:
+		asm("nop");		// Mode is unsupported
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	if (mode!=LATCHED_16)
+	{
+#if defined(CTE_DUE_SHIELD)
+		if (mode==16)
+		{
+			REG_PIOC_OER=0x000FF1FE;
+		}
+		else
+			REG_PIOC_OER=0x000FF000;
+#elif defined(EHOUSE_DUE_SHIELD)
+		if (mode==16)
+		{
+			REG_PIOC_OER=0x000FF3FC;
+			REG_PIOC_OWER=0x000FF3FC;
+		}
+		else
+			REG_PIOC_OER=0x000FF000;
+#else
+		REG_PIOA_OER=0x0000c000; //PA14,PA15 enable
+		REG_PIOB_OER=0x04000000; //PB26 enable
+		REG_PIOD_OER=0x0000064f; //PD0-3,PD6,PD9-10 enable
+		if (mode==16)
+		{
+			REG_PIOA_OER=0x00000080; //PA7 enable
+			REG_PIOC_OER=0x0000003e; //PC1 - PC5 enable
+		}
+#endif
+	}
+	else
+	{
+		asm("nop");		// Mode is unsupported
+	}
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+#if defined(CTE_DUE_SHIELD)
+    REG_PIOC_CODR=0xFF1FE;
+	REG_PIOC_SODR=(cl<<1) & 0x1FE;
+	REG_PIOC_SODR=(ch<<12) & 0xFF000;
+#elif defined(EHOUSE_DUE_SHIELD)
+	PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)cl)<<2) | (((uint32_t)ch)<<12)));
+#else
+	REG_PIOA_CODR=0x0000C080;
+	REG_PIOC_CODR=0x0000003E;
+	REG_PIOD_CODR=0x0000064F;
+	REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1);
+	(ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
+	REG_PIOC_SODR=((cl & 0x01)<<5) | ((cl & 0x02)<<3) | ((cl & 0x04)<<1) | ((cl & 0x08)>>1) | ((cl & 0x10)>>3);
+	REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1) | ((cl & 0x20)<<5) | ((cl & 0x80)<<2);
+#endif
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD)
+    REG_PIOC_CODR=0xFF000;
+	REG_PIOC_SODR=(ch<<12) & 0xFF000;
+#else
+	REG_PIOA_CODR=0x0000C000;
+	REG_PIOD_CODR=0x0000064F;
+	REG_PIOA_SODR=(ch & 0x06)<<13;
+	(ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
+	REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1);
+#endif
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h b/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h
new file mode 100644
index 0000000..feb52c4
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h
@@ -0,0 +1,239 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+		PORTG &= ~0x20;
+		PORTG |= (VH & 0x10)<<1;
+		PORTH &= ~0x18;
+		PORTH |= (VH & 0xC0)>>3;
+		PORTE &= ~0x3B;
+		PORTE |= (VH & 0x03) + ((VH & 0x0C)<<2) + ((VH & 0x20)>>2);
+		pulse_low(P_WR, B_WR);
+		PORTG &= ~0x20;
+		PORTG |= (VL & 0x10)<<1;
+		PORTH &= ~0x18;
+		PORTH |= (VL & 0xC0)>>3;
+		PORTE &= ~0x3B;
+		PORTE |= (VL & 0x03) + ((VL & 0x0C)<<2) + ((VL & 0x20)>>2);
+		pulse_low(P_WR, B_WR);
+#else
+		PORTA = VH;
+		pulse_low(P_WR, B_WR);
+		PORTA = VL;
+		pulse_low(P_WR, B_WR);
+#endif
+		break;
+	case 16:
+		PORTA = VH;
+		PORTC = VL;
+		pulse_low(P_WR, B_WR);
+		break;
+	case LATCHED_16:
+		PORTG &= ~0x20;	
+		PORTG |= (VH & 0x10)<<1;	
+		PORTH &= ~0x18;	
+		PORTH |= (VH & 0xC0)>>3;	
+		PORTE &= ~0x3B;	
+		PORTE |= (VH & 0x03) + ((VH & 0x0C)<<2) + ((VH & 0x20)>>2);
+		cbi(P_ALE, B_ALE);
+		pulse_high(P_ALE, B_ALE);
+		cbi(P_CS, B_CS);
+		PORTG &= ~0x20;	
+		PORTG |= (VL & 0x10)<<1;	
+		PORTH &= ~0x18;	
+		PORTH |= (VL & 0xC0)>>3;	
+		PORTE &= ~0x3B;	
+		PORTE |= (VL & 0x03) + ((VL & 0x0C)<<2) + ((VL & 0x20)>>2);
+		pulse_low(P_WR, B_WR);
+		sbi(P_CS, B_CS);
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+	DDRH = 0x18;
+	DDRG = 0x20;
+	DDRE = 0x3B;
+#else
+	if (mode!=LATCHED_16)
+	{
+		DDRA = 0xFF;
+		if (mode==16)
+			DDRC = 0xFF;
+	}
+	else
+	{
+		DDRH = 0x18;
+		DDRG = 0x20;
+		DDRE = 0x3B;
+	}
+#endif
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+	if (ch==cl)
+		_fast_fill_8(ch, pix);
+	else
+	{
+		for (int i=0; i<pix; i++)
+		{
+			PORTG &= ~0x20;
+			PORTG |= (ch & 0x10)<<1;
+			PORTH &= ~0x18;
+			PORTH |= (ch & 0xC0)>>3;
+			PORTE &= ~0x3B;
+			PORTE |= (ch & 0x03) + ((ch & 0x0C)<<2) + ((ch & 0x20)>>2);
+			pulse_low(P_WR, B_WR);
+			PORTG &= ~0x20;
+			PORTG |= (cl & 0x10)<<1;
+			PORTH &= ~0x18;
+			PORTH |= (cl & 0xC0)>>3;
+			PORTE &= ~0x3B;
+			PORTE |= (cl & 0x03) + ((cl & 0x0C)<<2) + ((cl & 0x20)>>2);
+			pulse_low(P_WR, B_WR);
+		}
+	}
+#else
+	long blocks;
+
+	PORTA = ch;
+	PORTC = cl;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+#endif
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+	PORTG &= ~0x20;
+	PORTG |= (ch & 0x10)<<1;
+	PORTH &= ~0x18;
+	PORTH |= (ch & 0xC0)>>3;
+	PORTE &= ~0x3B;
+	PORTE |= (ch & 0x03) + ((ch & 0x0C)<<2) + ((ch & 0x20)>>2);
+#else
+	PORTA = ch;
+#endif
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h b/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h
new file mode 100644
index 0000000..d0c552d
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h
@@ -0,0 +1,190 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		cport (PORTD, 0xF0);
+		sport (PORTD, (VH & 0x0F));
+		cport (PORTB, 0xF0);
+		sport (PORTB, (VH & 0xF0)>>4);
+		pulse_low(P_WR, B_WR);
+		cport (PORTD, 0xF0);
+		sport (PORTD, (VL & 0x0F));
+		cport (PORTB, 0xF0);
+		sport (PORTB, (VL & 0xF0)>>4);
+		pulse_low(P_WR, B_WR);
+		break;
+	case 16:
+		cport (PORTD, 0x90);
+		sport (PORTD, (VH & 0x0F) | ((VL & 0x03)<<5));
+		PORTB = ((VH & 0xF0)>>4) | ((VL & 0x3C)<<2);
+		cport (PORTA, 0x3F);
+		sport (PORTA, ((VL & 0x40)<<1) | ((VL & 0x80)>>1));
+		pulse_low(P_WR, B_WR);
+		break;
+	case LATCHED_16:
+		cport (PORTD, 0xF0);
+		sport (PORTD, (VH & 0x0F));
+		cport (PORTB, 0xF0);
+		sport (PORTB, (VH & 0xF0)>>4);
+		cbi(P_ALE, B_ALE);
+		pulse_high(P_ALE, B_ALE);
+		cbi(P_CS, B_CS);
+		cport (PORTD, 0xF0);
+		sport (PORTD, (VL & 0x0F));
+		cport (PORTB, 0xF0);
+		sport (PORTB, (VL & 0xF0)>>4);
+		pulse_low(P_WR, B_WR);
+		sbi(P_CS, B_CS);
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	DDRB |= 0x0F;
+	DDRD |= 0x0F;
+	if (mode==16)
+	{
+		DDRB =  0xFF;
+		DDRD |= 0x6F;
+		DDRA |= 0xC0;
+	}
+
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	cport (PORTD, 0x90);
+	sport (PORTD, (ch & 0x0F) | ((cl & 0x03)<<5));
+	PORTB = ((ch & 0xF0)>>4) | ((cl & 0x3C)<<2);
+	cport (PORTA, 0x3F);
+	sport (PORTA, ((cl & 0x40)<<1) | ((cl & 0x80)>>1));
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	cport (PORTD, 0xF0);
+	sport (PORTD, (ch & 0x0F));
+	cport (PORTB, 0xF0);
+	sport (PORTB, (ch & 0xF0)>>4);
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h b/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h
new file mode 100644
index 0000000..bb0cdfd
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h
@@ -0,0 +1,171 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		PORTD = VH;
+		pulse_low(P_WR, B_WR);
+		PORTD = VL;
+		pulse_low(P_WR, B_WR);
+		break;
+	case 16:
+		PORTD = VH;
+		cport(PORTC, 0xFC);
+		sport(PORTC, (VL>>6) & 0x03);
+		PORTB =  VL & 0x3F;
+		pulse_low(P_WR, B_WR);
+		break;
+	case LATCHED_16:
+		PORTD = VH;
+		cbi(P_ALE, B_ALE);
+		pulse_high(P_ALE, B_ALE);
+		cbi(P_CS, B_CS);
+		PORTD =  VL;
+		pulse_low(P_WR, B_WR);
+		sbi(P_CS, B_CS);
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	DDRD = 0xFF;
+	if (mode==16)
+	{
+		DDRB |= 0x3F;
+		DDRC |= 0x03;
+	}
+
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	PORTD = ch;
+	cport(PORTC, 0xFC);
+	sport(PORTC, (cl>>6) & 0x03);
+	PORTB =  cl & 0x3F;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	PORTD = ch;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h b/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h
new file mode 100644
index 0000000..d4ff7a7
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h
@@ -0,0 +1,222 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		cport(PORTC, 0xBF);
+		cport(PORTD, 0x60);
+		cport(PORTE, 0xBF);
+		PORTC += ((VH & 0x20)<<1);
+		PORTD += ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2);
+		PORTE += ((VH & 0x80)>>1);
+		pulse_low(P_WR, B_WR);
+
+		cport(PORTC, 0xBF);
+		cport(PORTD, 0x60);
+		cport(PORTE, 0xBF);
+		PORTC += ((VL & 0x20)<<1);
+		PORTD += ((VL & 0x40)<<1) + (VL & 0x10) + ((VL & 0x08)>>3) + ((VL & 0x04)>>1) + ((VL & 0x03)<<2);
+		PORTE += ((VL & 0x80)>>1);
+		pulse_low(P_WR, B_WR);
+		break;
+	case 16:
+		cport(PORTB, 0x0F);
+		cport(PORTC, 0x3F);
+		cport(PORTD, 0x20);
+		cport(PORTE, 0xBF);
+		cport(PORTF, 0x3F);
+
+		PORTB |= ((VL & 0x0F)<<4);
+		PORTC |= ((VL & 0x20)<<2) + ((VH & 0x20)<<1);
+		PORTD |= ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2) + ((VL & 0x10)<<2);
+		PORTE |= ((VH & 0x80)>>1);
+		PORTF |= ((VL & 0x80)>>1) + ((VL & 0x40)<<1);
+
+		pulse_low(P_WR, B_WR);
+		break;
+	case LATCHED_16:
+		cport(PORTC, 0xBF);
+		cport(PORTD, 0x60);
+		cport(PORTE, 0xBF);
+		PORTC += ((VH & 0x20)<<1);
+		PORTD += ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2);
+		PORTE += ((VH & 0x80)>>1);
+		cbi(P_ALE, B_ALE);
+		pulse_high(P_ALE, B_ALE);
+		cbi(P_CS, B_CS);
+		cport(PORTC, 0xBF);
+		cport(PORTD, 0x60);
+		cport(PORTE, 0xBF);
+		PORTC += ((VL & 0x20)<<1);
+		PORTD += ((VL & 0x40)<<1) + (VL & 0x10) + ((VL & 0x08)>>3) + ((VL & 0x04)>>1) + ((VL & 0x03)<<2);
+		PORTE += ((VL & 0x80)>>1);
+		pulse_low(P_WR, B_WR);
+		sbi(P_CS, B_CS);
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	switch (mode)
+	{
+	case 8:
+	case LATCHED_16:
+		DDRC |= 0x40;
+		DDRD |= 0x9F;
+		DDRE |= 0x40;
+		break;
+	case 16:
+		DDRB |= 0xF0;
+		DDRC |= 0xC0;
+		DDRD |= 0xDF;
+		DDRE |= 0x40;
+		DDRF |= 0xC0;
+		break;
+	}
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	cport(PORTB, 0x0F);
+	cport(PORTC, 0x3F);
+	cport(PORTD, 0x20);
+	cport(PORTE, 0xBF);
+	cport(PORTF, 0x3F);
+
+	PORTB |= ((cl & 0x0F)<<4);
+	PORTC |= ((cl & 0x20)<<2) + ((ch & 0x20)<<1);
+	PORTD |= ((ch & 0x40)<<1) + (ch & 0x10) + ((ch & 0x08)>>3) + ((ch & 0x04)>>1) + ((ch & 0x03)<<2) + ((cl & 0x10)<<2);
+	PORTE |= ((ch & 0x80)>>1);
+	PORTF |= ((cl & 0x80)>>1) + ((cl & 0x40)<<1);
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	cport(PORTC, 0xBF);
+	cport(PORTD, 0x60);
+	cport(PORTE, 0xBF);
+
+	PORTC |= ((ch & 0x20)<<1);
+	PORTD |= ((ch & 0x40)<<1) + (ch & 0x10) + ((ch & 0x08)>>3) + ((ch & 0x04)>>1) + ((ch & 0x03)<<2);
+	PORTE |= ((ch & 0x80)>>1);
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+		}
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_AVR.h b/libraries/MultiLCD/hardware/avr/HW_AVR.h
new file mode 100644
index 0000000..669ecc0
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_AVR.h
@@ -0,0 +1,4 @@
+void UTFT::_convert_float(char *buf, double num, int width, byte prec)
+{
+	dtostrf(num, width, prec, buf);
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h b/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h
new file mode 100644
index 0000000..557778c
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h
@@ -0,0 +1,25 @@
+// Enable or disable the use of a display shield designed for use on 
+// an Arduino Uno (or compatible) on an Arduino Mega
+//
+// ** Currently only available for 8bit display shields **
+//
+// Uncomment the following line to enable this feature
+//#define USE_UNO_SHIELD_ON_MEGA 1
+//********************************************************************
+
+// *** Hardwarespecific defines ***
+#define cbi(reg, bitmask) *reg &= ~bitmask
+#define sbi(reg, bitmask) *reg |= bitmask
+#define pulse_high(reg, bitmask) sbi(reg, bitmask); cbi(reg, bitmask);
+#define pulse_low(reg, bitmask) cbi(reg, bitmask); sbi(reg, bitmask);
+
+#define cport(port, data) port &= data
+#define sport(port, data) port |= data
+
+#define swap(type, i, j) {type t = i; i = j; j = t;}
+
+#define fontbyte(x) pgm_read_byte(&cfont.font[x])  
+
+#define regtype volatile uint8_t
+#define regsize uint8_t
+#define bitmapdatatype unsigned int*
diff --git a/libraries/MultiLCD/hardware/pic32/HW_PIC32.h b/libraries/MultiLCD/hardware/pic32/HW_PIC32.h
new file mode 100644
index 0000000..c71a5ff
--- /dev/null
+++ b/libraries/MultiLCD/hardware/pic32/HW_PIC32.h
@@ -0,0 +1,7 @@
+void UTFT::_convert_float(char *buf, double num, int width, byte prec)
+{
+	char format[10];
+	
+	sprintf(format, "%%%i.%if", width, prec);
+	sprintf(buf, format, num);
+}
diff --git a/libraries/MultiLCD/hardware/pic32/HW_PIC32MX320F128H.h b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX320F128H.h
new file mode 100644
index 0000000..7ea4466
--- /dev/null
+++ b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX320F128H.h
@@ -0,0 +1,174 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		LATECLR = 0xFF;
+		LATESET = VH;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		LATECLR = 0xFF;
+		LATESET = VL;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case 16:
+		LATDCLR = 0xFF;
+		LATDSET = VL & 0xFF;
+		LATECLR = 0xFF;
+		LATESET = VH & 0xFF;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case LATCHED_16:
+		asm("nop");		// Mode is unsupported
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	if (mode!=LATCHED_16)
+	{
+		TRISE=0;
+		if (mode==16)
+			TRISD=0;
+	}
+	else
+	{
+		asm("nop");		// Mode is unsupported
+	}
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	LATDCLR = 0xFF;
+	LATDSET = cl & 0xFF;
+	LATECLR = 0xFF;
+	LATESET = ch & 0xFF;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	LATECLR = 0xFF;
+	LATESET = ch;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		}
+}
diff --git a/libraries/MultiLCD/hardware/pic32/HW_PIC32MX340F512H.h b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX340F512H.h
new file mode 100644
index 0000000..7ea4466
--- /dev/null
+++ b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX340F512H.h
@@ -0,0 +1,174 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		LATECLR = 0xFF;
+		LATESET = VH;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		LATECLR = 0xFF;
+		LATESET = VL;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case 16:
+		LATDCLR = 0xFF;
+		LATDSET = VL & 0xFF;
+		LATECLR = 0xFF;
+		LATESET = VH & 0xFF;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case LATCHED_16:
+		asm("nop");		// Mode is unsupported
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	if (mode!=LATCHED_16)
+	{
+		TRISE=0;
+		if (mode==16)
+			TRISD=0;
+	}
+	else
+	{
+		asm("nop");		// Mode is unsupported
+	}
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+	LATDCLR = 0xFF;
+	LATDSET = cl & 0xFF;
+	LATECLR = 0xFF;
+	LATESET = ch & 0xFF;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	LATECLR = 0xFF;
+	LATESET = ch;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		}
+}
diff --git a/libraries/MultiLCD/hardware/pic32/HW_PIC32MX795F512L.h b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX795F512L.h
new file mode 100644
index 0000000..15822f1
--- /dev/null
+++ b/libraries/MultiLCD/hardware/pic32/HW_PIC32MX795F512L.h
@@ -0,0 +1,188 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{   
+	switch (mode)
+	{
+	case 1:
+		if (display_serial_mode==SERIAL_4PIN)
+		{
+		if (VH==1)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		}
+		else
+		{
+		if (VH==1)
+			sbi(P_RS, B_RS);
+		else
+			cbi(P_RS, B_RS);
+		}
+
+		if (VL & 0x80)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x40)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x20)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x10)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x08)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x04)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x02)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		if (VL & 0x01)
+			sbi(P_SDA, B_SDA);
+		else
+			cbi(P_SDA, B_SDA);
+		pulse_low(P_SCL, B_SCL);
+		break;
+	case 8:
+		LATECLR = 0xFF;
+		LATESET = VH;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		LATECLR = 0xFF;
+		LATESET = VL;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case 16:
+#ifdef AQUALED_SHIELD
+		LATACLR = 0xFF;
+		LATASET = VL & 0xFF;
+#else
+		LATDCLR = 0xFF;
+		LATDSET = VL & 0xFF;
+#endif
+		LATECLR = 0xFF;
+		LATESET = VH & 0xFF;
+		*P_WR &= ~B_WR;
+		*P_WR |= B_WR;
+		break;
+	case LATCHED_16:
+		asm("nop");		// Mode is unsupported
+		break;
+	}
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+	if (mode!=LATCHED_16)
+	{
+		TRISE=0;
+		if (mode==16)
+#ifdef AQUALED_SHIELD
+			TRISA=0;
+#else
+			TRISD=0;
+#endif
+	}
+	else
+	{
+		asm("nop");		// Mode is unsupported
+	}
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+	long blocks;
+
+#ifdef AQUALED_SHIELD
+	LATACLR = 0xFF;
+	LATASET = cl & 0xFF;
+#else
+	LATDCLR = 0xFF;
+	LATDSET = cl & 0xFF;
+#endif
+	LATECLR = 0xFF;
+	LATESET = ch & 0xFF;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		*P_WR &= ~B_WR;	*P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR;	*P_WR |= B_WR;
+		}
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+	long blocks;
+
+	LATECLR = 0xFF;
+	LATESET = ch;
+
+	blocks = pix/16;
+	for (int i=0; i<blocks; i++)
+	{
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+	}
+	if ((pix % 16) != 0)
+		for (int i=0; i<(pix % 16)+1; i++)
+		{
+			*P_WR &= ~B_WR; *P_WR |= B_WR; *P_WR &= ~B_WR; *P_WR |= B_WR;
+		}
+}
diff --git a/libraries/MultiLCD/hardware/pic32/HW_PIC32_defines.h b/libraries/MultiLCD/hardware/pic32/HW_PIC32_defines.h
new file mode 100644
index 0000000..4b83daa
--- /dev/null
+++ b/libraries/MultiLCD/hardware/pic32/HW_PIC32_defines.h
@@ -0,0 +1,26 @@
+// AquaLEDSource All in One Super Screw Shield
+// -------------------------------------------
+// Uncomment the following line if you are using this shield
+//#define AQUALED_SHIELD 1
+//
+// For this shield: RS=82, WR=83, CS=84, RST=85 (Standard for chipKit Max32)
+//**************************************************************************
+
+// *** Hardwarespecific defines ***
+#define cbi(reg, bitmask) (*(reg + 1)) = bitmask
+#define sbi(reg, bitmask) (*(reg + 2)) = bitmask
+#define pulse_high(reg, bitmask) sbi(reg, bitmask); cbi(reg, bitmask);
+#define pulse_low(reg, bitmask) cbi(reg, bitmask); sbi(reg, bitmask);
+
+#define cport(port, data) port &= data
+#define sport(port, data) port |= data
+
+#define swap(type, i, j) {type t = i; i = j; j = t;}
+
+#define fontbyte(x) cfont.font[x]  
+
+#define PROGMEM
+#define regtype volatile uint32_t
+#define regsize uint16_t
+#define bitmapdatatype unsigned short*
+