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-rw-r--r--libraries/MultiLCD/hardware/avr/HW_ATmega1280.h239
-rw-r--r--libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h190
-rw-r--r--libraries/MultiLCD/hardware/avr/HW_ATmega328P.h171
-rw-r--r--libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h222
-rw-r--r--libraries/MultiLCD/hardware/avr/HW_AVR.h4
-rw-r--r--libraries/MultiLCD/hardware/avr/HW_AVR_defines.h25
6 files changed, 851 insertions, 0 deletions
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h b/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h
new file mode 100644
index 0000000..feb52c4
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega1280.h
@@ -0,0 +1,239 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{
+ switch (mode)
+ {
+ case 1:
+ if (display_serial_mode==SERIAL_4PIN)
+ {
+ if (VH==1)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ }
+ else
+ {
+ if (VH==1)
+ sbi(P_RS, B_RS);
+ else
+ cbi(P_RS, B_RS);
+ }
+
+ if (VL & 0x80)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x40)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x20)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x10)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x08)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x04)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x02)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x01)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ break;
+ case 8:
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+ PORTG &= ~0x20;
+ PORTG |= (VH & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (VH & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (VH & 0x03) + ((VH & 0x0C)<<2) + ((VH & 0x20)>>2);
+ pulse_low(P_WR, B_WR);
+ PORTG &= ~0x20;
+ PORTG |= (VL & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (VL & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (VL & 0x03) + ((VL & 0x0C)<<2) + ((VL & 0x20)>>2);
+ pulse_low(P_WR, B_WR);
+#else
+ PORTA = VH;
+ pulse_low(P_WR, B_WR);
+ PORTA = VL;
+ pulse_low(P_WR, B_WR);
+#endif
+ break;
+ case 16:
+ PORTA = VH;
+ PORTC = VL;
+ pulse_low(P_WR, B_WR);
+ break;
+ case LATCHED_16:
+ PORTG &= ~0x20;
+ PORTG |= (VH & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (VH & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (VH & 0x03) + ((VH & 0x0C)<<2) + ((VH & 0x20)>>2);
+ cbi(P_ALE, B_ALE);
+ pulse_high(P_ALE, B_ALE);
+ cbi(P_CS, B_CS);
+ PORTG &= ~0x20;
+ PORTG |= (VL & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (VL & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (VL & 0x03) + ((VL & 0x0C)<<2) + ((VL & 0x20)>>2);
+ pulse_low(P_WR, B_WR);
+ sbi(P_CS, B_CS);
+ break;
+ }
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+ DDRH = 0x18;
+ DDRG = 0x20;
+ DDRE = 0x3B;
+#else
+ if (mode!=LATCHED_16)
+ {
+ DDRA = 0xFF;
+ if (mode==16)
+ DDRC = 0xFF;
+ }
+ else
+ {
+ DDRH = 0x18;
+ DDRG = 0x20;
+ DDRE = 0x3B;
+ }
+#endif
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+ if (ch==cl)
+ _fast_fill_8(ch, pix);
+ else
+ {
+ for (int i=0; i<pix; i++)
+ {
+ PORTG &= ~0x20;
+ PORTG |= (ch & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (ch & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (ch & 0x03) + ((ch & 0x0C)<<2) + ((ch & 0x20)>>2);
+ pulse_low(P_WR, B_WR);
+ PORTG &= ~0x20;
+ PORTG |= (cl & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (cl & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (cl & 0x03) + ((cl & 0x0C)<<2) + ((cl & 0x20)>>2);
+ pulse_low(P_WR, B_WR);
+ }
+ }
+#else
+ long blocks;
+
+ PORTA = ch;
+ PORTC = cl;
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ }
+#endif
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+ long blocks;
+
+#if defined(USE_UNO_SHIELD_ON_MEGA)
+ PORTG &= ~0x20;
+ PORTG |= (ch & 0x10)<<1;
+ PORTH &= ~0x18;
+ PORTH |= (ch & 0xC0)>>3;
+ PORTE &= ~0x3B;
+ PORTE |= (ch & 0x03) + ((ch & 0x0C)<<2) + ((ch & 0x20)>>2);
+#else
+ PORTA = ch;
+#endif
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h b/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h
new file mode 100644
index 0000000..d0c552d
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega1284P.h
@@ -0,0 +1,190 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{
+ switch (mode)
+ {
+ case 1:
+ if (display_serial_mode==SERIAL_4PIN)
+ {
+ if (VH==1)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ }
+ else
+ {
+ if (VH==1)
+ sbi(P_RS, B_RS);
+ else
+ cbi(P_RS, B_RS);
+ }
+
+ if (VL & 0x80)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x40)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x20)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x10)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x08)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x04)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x02)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x01)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ break;
+ case 8:
+ cport (PORTD, 0xF0);
+ sport (PORTD, (VH & 0x0F));
+ cport (PORTB, 0xF0);
+ sport (PORTB, (VH & 0xF0)>>4);
+ pulse_low(P_WR, B_WR);
+ cport (PORTD, 0xF0);
+ sport (PORTD, (VL & 0x0F));
+ cport (PORTB, 0xF0);
+ sport (PORTB, (VL & 0xF0)>>4);
+ pulse_low(P_WR, B_WR);
+ break;
+ case 16:
+ cport (PORTD, 0x90);
+ sport (PORTD, (VH & 0x0F) | ((VL & 0x03)<<5));
+ PORTB = ((VH & 0xF0)>>4) | ((VL & 0x3C)<<2);
+ cport (PORTA, 0x3F);
+ sport (PORTA, ((VL & 0x40)<<1) | ((VL & 0x80)>>1));
+ pulse_low(P_WR, B_WR);
+ break;
+ case LATCHED_16:
+ cport (PORTD, 0xF0);
+ sport (PORTD, (VH & 0x0F));
+ cport (PORTB, 0xF0);
+ sport (PORTB, (VH & 0xF0)>>4);
+ cbi(P_ALE, B_ALE);
+ pulse_high(P_ALE, B_ALE);
+ cbi(P_CS, B_CS);
+ cport (PORTD, 0xF0);
+ sport (PORTD, (VL & 0x0F));
+ cport (PORTB, 0xF0);
+ sport (PORTB, (VL & 0xF0)>>4);
+ pulse_low(P_WR, B_WR);
+ sbi(P_CS, B_CS);
+ break;
+ }
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+ DDRB |= 0x0F;
+ DDRD |= 0x0F;
+ if (mode==16)
+ {
+ DDRB = 0xFF;
+ DDRD |= 0x6F;
+ DDRA |= 0xC0;
+ }
+
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+ long blocks;
+
+ cport (PORTD, 0x90);
+ sport (PORTD, (ch & 0x0F) | ((cl & 0x03)<<5));
+ PORTB = ((ch & 0xF0)>>4) | ((cl & 0x3C)<<2);
+ cport (PORTA, 0x3F);
+ sport (PORTA, ((cl & 0x40)<<1) | ((cl & 0x80)>>1));
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ }
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+ long blocks;
+
+ cport (PORTD, 0xF0);
+ sport (PORTD, (ch & 0x0F));
+ cport (PORTB, 0xF0);
+ sport (PORTB, (ch & 0xF0)>>4);
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h b/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h
new file mode 100644
index 0000000..bb0cdfd
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega328P.h
@@ -0,0 +1,171 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{
+ switch (mode)
+ {
+ case 1:
+ if (display_serial_mode==SERIAL_4PIN)
+ {
+ if (VH==1)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ }
+ else
+ {
+ if (VH==1)
+ sbi(P_RS, B_RS);
+ else
+ cbi(P_RS, B_RS);
+ }
+
+ if (VL & 0x80)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x40)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x20)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x10)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x08)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x04)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x02)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x01)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ break;
+ case 8:
+ PORTD = VH;
+ pulse_low(P_WR, B_WR);
+ PORTD = VL;
+ pulse_low(P_WR, B_WR);
+ break;
+ case 16:
+ PORTD = VH;
+ cport(PORTC, 0xFC);
+ sport(PORTC, (VL>>6) & 0x03);
+ PORTB = VL & 0x3F;
+ pulse_low(P_WR, B_WR);
+ break;
+ case LATCHED_16:
+ PORTD = VH;
+ cbi(P_ALE, B_ALE);
+ pulse_high(P_ALE, B_ALE);
+ cbi(P_CS, B_CS);
+ PORTD = VL;
+ pulse_low(P_WR, B_WR);
+ sbi(P_CS, B_CS);
+ break;
+ }
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+ DDRD = 0xFF;
+ if (mode==16)
+ {
+ DDRB |= 0x3F;
+ DDRC |= 0x03;
+ }
+
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+ long blocks;
+
+ PORTD = ch;
+ cport(PORTC, 0xFC);
+ sport(PORTC, (cl>>6) & 0x03);
+ PORTB = cl & 0x3F;
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ }
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+ long blocks;
+
+ PORTD = ch;
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h b/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h
new file mode 100644
index 0000000..d4ff7a7
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_ATmega32U4.h
@@ -0,0 +1,222 @@
+// *** Hardwarespecific functions ***
+void UTFT::_hw_special_init()
+{
+}
+
+void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
+{
+ switch (mode)
+ {
+ case 1:
+ if (display_serial_mode==SERIAL_4PIN)
+ {
+ if (VH==1)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ }
+ else
+ {
+ if (VH==1)
+ sbi(P_RS, B_RS);
+ else
+ cbi(P_RS, B_RS);
+ }
+
+ if (VL & 0x80)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x40)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x20)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x10)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x08)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x04)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x02)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ if (VL & 0x01)
+ sbi(P_SDA, B_SDA);
+ else
+ cbi(P_SDA, B_SDA);
+ pulse_low(P_SCL, B_SCL);
+ break;
+ case 8:
+ cport(PORTC, 0xBF);
+ cport(PORTD, 0x60);
+ cport(PORTE, 0xBF);
+ PORTC += ((VH & 0x20)<<1);
+ PORTD += ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2);
+ PORTE += ((VH & 0x80)>>1);
+ pulse_low(P_WR, B_WR);
+
+ cport(PORTC, 0xBF);
+ cport(PORTD, 0x60);
+ cport(PORTE, 0xBF);
+ PORTC += ((VL & 0x20)<<1);
+ PORTD += ((VL & 0x40)<<1) + (VL & 0x10) + ((VL & 0x08)>>3) + ((VL & 0x04)>>1) + ((VL & 0x03)<<2);
+ PORTE += ((VL & 0x80)>>1);
+ pulse_low(P_WR, B_WR);
+ break;
+ case 16:
+ cport(PORTB, 0x0F);
+ cport(PORTC, 0x3F);
+ cport(PORTD, 0x20);
+ cport(PORTE, 0xBF);
+ cport(PORTF, 0x3F);
+
+ PORTB |= ((VL & 0x0F)<<4);
+ PORTC |= ((VL & 0x20)<<2) + ((VH & 0x20)<<1);
+ PORTD |= ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2) + ((VL & 0x10)<<2);
+ PORTE |= ((VH & 0x80)>>1);
+ PORTF |= ((VL & 0x80)>>1) + ((VL & 0x40)<<1);
+
+ pulse_low(P_WR, B_WR);
+ break;
+ case LATCHED_16:
+ cport(PORTC, 0xBF);
+ cport(PORTD, 0x60);
+ cport(PORTE, 0xBF);
+ PORTC += ((VH & 0x20)<<1);
+ PORTD += ((VH & 0x40)<<1) + (VH & 0x10) + ((VH & 0x08)>>3) + ((VH & 0x04)>>1) + ((VH & 0x03)<<2);
+ PORTE += ((VH & 0x80)>>1);
+ cbi(P_ALE, B_ALE);
+ pulse_high(P_ALE, B_ALE);
+ cbi(P_CS, B_CS);
+ cport(PORTC, 0xBF);
+ cport(PORTD, 0x60);
+ cport(PORTE, 0xBF);
+ PORTC += ((VL & 0x20)<<1);
+ PORTD += ((VL & 0x40)<<1) + (VL & 0x10) + ((VL & 0x08)>>3) + ((VL & 0x04)>>1) + ((VL & 0x03)<<2);
+ PORTE += ((VL & 0x80)>>1);
+ pulse_low(P_WR, B_WR);
+ sbi(P_CS, B_CS);
+ break;
+ }
+}
+
+void UTFT::_set_direction_registers(byte mode)
+{
+ switch (mode)
+ {
+ case 8:
+ case LATCHED_16:
+ DDRC |= 0x40;
+ DDRD |= 0x9F;
+ DDRE |= 0x40;
+ break;
+ case 16:
+ DDRB |= 0xF0;
+ DDRC |= 0xC0;
+ DDRD |= 0xDF;
+ DDRE |= 0x40;
+ DDRF |= 0xC0;
+ break;
+ }
+}
+
+void UTFT::_fast_fill_16(int ch, int cl, long pix)
+{
+ long blocks;
+
+ cport(PORTB, 0x0F);
+ cport(PORTC, 0x3F);
+ cport(PORTD, 0x20);
+ cport(PORTE, 0xBF);
+ cport(PORTF, 0x3F);
+
+ PORTB |= ((cl & 0x0F)<<4);
+ PORTC |= ((cl & 0x20)<<2) + ((ch & 0x20)<<1);
+ PORTD |= ((ch & 0x40)<<1) + (ch & 0x10) + ((ch & 0x08)>>3) + ((ch & 0x04)>>1) + ((ch & 0x03)<<2) + ((cl & 0x10)<<2);
+ PORTE |= ((ch & 0x80)>>1);
+ PORTF |= ((cl & 0x80)>>1) + ((cl & 0x40)<<1);
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);
+ }
+}
+
+void UTFT::_fast_fill_8(int ch, long pix)
+{
+ long blocks;
+
+ cport(PORTC, 0xBF);
+ cport(PORTD, 0x60);
+ cport(PORTE, 0xBF);
+
+ PORTC |= ((ch & 0x20)<<1);
+ PORTD |= ((ch & 0x40)<<1) + (ch & 0x10) + ((ch & 0x08)>>3) + ((ch & 0x04)>>1) + ((ch & 0x03)<<2);
+ PORTE |= ((ch & 0x80)>>1);
+
+ blocks = pix/16;
+ for (int i=0; i<blocks; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+ if ((pix % 16) != 0)
+ for (int i=0; i<(pix % 16)+1; i++)
+ {
+ pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
+ }
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_AVR.h b/libraries/MultiLCD/hardware/avr/HW_AVR.h
new file mode 100644
index 0000000..669ecc0
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_AVR.h
@@ -0,0 +1,4 @@
+void UTFT::_convert_float(char *buf, double num, int width, byte prec)
+{
+ dtostrf(num, width, prec, buf);
+}
diff --git a/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h b/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h
new file mode 100644
index 0000000..557778c
--- /dev/null
+++ b/libraries/MultiLCD/hardware/avr/HW_AVR_defines.h
@@ -0,0 +1,25 @@
+// Enable or disable the use of a display shield designed for use on
+// an Arduino Uno (or compatible) on an Arduino Mega
+//
+// ** Currently only available for 8bit display shields **
+//
+// Uncomment the following line to enable this feature
+//#define USE_UNO_SHIELD_ON_MEGA 1
+//********************************************************************
+
+// *** Hardwarespecific defines ***
+#define cbi(reg, bitmask) *reg &= ~bitmask
+#define sbi(reg, bitmask) *reg |= bitmask
+#define pulse_high(reg, bitmask) sbi(reg, bitmask); cbi(reg, bitmask);
+#define pulse_low(reg, bitmask) cbi(reg, bitmask); sbi(reg, bitmask);
+
+#define cport(port, data) port &= data
+#define sport(port, data) port |= data
+
+#define swap(type, i, j) {type t = i; i = j; j = t;}
+
+#define fontbyte(x) pgm_read_byte(&cfont.font[x])
+
+#define regtype volatile uint8_t
+#define regsize uint8_t
+#define bitmapdatatype unsigned int*
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-01 09:34:09 +0000